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B. Arejita, I. Garmendia, C. Roldán, A. Zuloaga, "Optimizing Process Time in Closed-Loop Laser Metal Deposition Processes Using Embedded Software and FPGA Hardware Acceleration", in B.H.V. Topping, P. Iványi, (Editors), "Proceedings of the Eleventh International Conference on Engineering Computational Technology", Civil-Comp Press, Edinburgh, UK, Online volume: CCC 2, Paper 16.1, 2022, doi:10.4203/ccc.2.16.1

Keywords: laser metal deposition, closed-loop control, robotics, embedded software, fpga, real-time, dynamic control.

Abstract

In laser metal deposition processes, a metal powder is melted with a high-power laser source to generate a 3D structure layer by layer. Due to the complex nature of the process, each generated layer presents a non-uniform surface that differs from the theoretical height, introducing cumulative errors in the material growth direction that can significantly impact the quality of the manufactured object. A typical LMD process performs a surface measurement to compensate for the previous layer height errors before the deposition of the material in the new layer. This intralayer measurement phase introduces a time overhead that affects the time needed to manufacture the part. This paper presents a method that minimizes the processing time by reducing the intralayer measurement time by implementing a hardware coprocessor implemented in a system on a chip (SoC) with an integrated FPGA. A laser line profiler attached to the LMD laser head that was mounted on an industrial robot has been used to measure the surface as the piece was scanned after finishing each layer material deposition. These allowed to generate height deviations and compute offsets in height and speed to be dynamically applied to the tool path in the following layer material deposition. The validation tests showed satisfactory results as the total process time was significantly reduced by minimizing the layer measurement phase time and eliminating the pre-deposition tool path modification phase as the changes were applied dynamically during the deposition.

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Front Page Browse CCC CCP CSETS CTR IJRT Other Authors Search Purchase Guide FAQ Contact us	Civil-Comp Conferences ISSN 2753-3239 CCC: 2 PROCEEDINGS OF THE ELEVENTH INTERNATIONAL CONFERENCE ON ENGINEERING COMPUTATIONAL TECHNOLOGY Edited by: B.H.V. Topping and P. Iványi Paper 16.1 Optimizing Process Time in Closed-Loop Laser Metal Deposition Processes Using Embedded Software and FPGA Hardware Acceleration B. Arejita^1,2, I. Garmendia³, C. Roldán¹ and A. Zuloaga² ¹EXOM Engineering, Barakaldo, Spain ²UPV/EHU, Bilbao, Spain ³Tekniker, Eibar, Spain doi:10.4203/ccc.2.16.1 Full Bibliographic Reference for this paper B. Arejita, I. Garmendia, C. Roldán, A. Zuloaga, "Optimizing Process Time in Closed-Loop Laser Metal Deposition Processes Using Embedded Software and FPGA Hardware Acceleration", in B.H.V. Topping, P. Iványi, (Editors), "Proceedings of the Eleventh International Conference on Engineering Computational Technology", Civil-Comp Press, Edinburgh, UK, Online volume: CCC 2, Paper 16.1, 2022, doi:10.4203/ccc.2.16.1 Keywords: laser metal deposition, closed-loop control, robotics, embedded software, fpga, real-time, dynamic control. Abstract In laser metal deposition processes, a metal powder is melted with a high-power laser source to generate a 3D structure layer by layer. Due to the complex nature of the process, each generated layer presents a non-uniform surface that differs from the theoretical height, introducing cumulative errors in the material growth direction that can significantly impact the quality of the manufactured object. A typical LMD process performs a surface measurement to compensate for the previous layer height errors before the deposition of the material in the new layer. This intralayer measurement phase introduces a time overhead that affects the time needed to manufacture the part. This paper presents a method that minimizes the processing time by reducing the intralayer measurement time by implementing a hardware coprocessor implemented in a system on a chip (SoC) with an integrated FPGA. A laser line profiler attached to the LMD laser head that was mounted on an industrial robot has been used to measure the surface as the piece was scanned after finishing each layer material deposition. These allowed to generate height deviations and compute offsets in height and speed to be dynamically applied to the tool path in the following layer material deposition. The validation tests showed satisfactory results as the total process time was significantly reduced by minimizing the layer measurement phase time and eliminating the pre-deposition tool path modification phase as the changes were applied dynamically during the deposition. download the full-text of this paper (PDF, 6 pages, 298 Kb) go to the previous paper go to the next paper return to the table of contents return to the volume description
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