The connection of microprocessor chips to printed circuit boards (PCB's) is achieved using solder materials, which bond the leads of the chip to the board. In the reflow process a board assembly passes through a reflow furnace where the solder (initially in the form of solder paste) melts, reflows, then solidifies, and finally deforms between the chip and board. A number of defects may occur during this process such as cracking of the joint, chip or board. These defects are a serious concern to industry, especially with trends towards increasing component miniaturisation and smaller pitch sizes. Modelling each chip on a board in detail will require huge mesh sizes. Also, the amount of physics governing this process will require predicting a number of dependent variables, such as temperature and stress. and how they change over time. Parallel computing opens up the possibility of undertaking such large simulations. This paper presents a multi-physics modelling approach to predicting solder joint shape, solidification, and deformation (stress) during this manufacturing process. The future use of a parallel version of a multi-physics code will also be discussed.

purchase the full-text of this paper (price £20)

go to the previous paper
go to the next paper
return to the table of contents
return to the book description
purchase this book (price £56 +P&P)